Summary: For a fixed-frequency peak current mode PWM boost DC-DC converter, this paper presents a design method for a current loop compensation circuit that features a simple structure and easy integration. The ramp generation circuit of this circuit converts the voltage on the on-chip oscillator's charge and discharge capacitor into a current, producing a ramp current with stable characteristics and adjustable slope. The current sampling circuit employs a SENSEFET combined with an optimized buffer stage and V/I conversion circuit, reducing losses while enhancing sampling accuracy. The entire circuit can be implemented using a 0.6 μm 15V BCD process. Simulation results from Cadence Spectre indicate that the circuit effectively suppresses sub-harmonic oscillations, with a sampling accuracy of 77.9% and a compensation slope accuracy of 81.5%.
Key words: slope compensation; current sampling; current mode; V/I conversion
Introduction: Fixed-frequency peak current mode PWM (Pulse Width Modulation) DC-DC converters offer significant advantages over traditional voltage mode control, including superior transient response, higher output precision, and stronger load capacity, making them widely adopted. As crucial analog components, the slope compensation circuit and current sampling circuit form the foundation of current mode PWM control and play a vital role in stabilizing the current loop within current mode control systems.
1. Circuit Structure: Figure 1 illustrates the block diagram of a typical peak current mode PWM Boost DC-DC control system. When the voltage feedback signal from the voltage outer loop is sent to the PWM comparator after being amplified by the error amplifier VE, a triangular wave or trapezoidal sharp-angled composite wave, representing the peak value of the output inductor current, is compared with the signal VE to generate a PWM pulse turn-off threshold. This threshold ensures precise regulation and stability during operation.
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This research aims to enhance the efficiency and reliability of DC-DC converters by optimizing the current loop compensation circuits. The design emphasizes simplicity and integration, leveraging advanced semiconductor processes to achieve high performance. Future work will focus on further improvements in sampling accuracy and exploring additional applications of these techniques in power electronics.
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