Intelligent terminal battery bottleneck analysis and solution

Experience pain points means market opportunities. After the terminal hardware competition enters a stable period, battery life becomes an important focus. The upstream and downstream parties in the terminal industry chain are competing to develop new technologies and solutions with low power consumption. From the perspective of the industry chain, this paper analyzes the key links of the smart phone, wearable and IoT terminal industry chain to solve the new technology and new solutions that are being used or will soon be applied.

1 Introduction

Battery life is the biggest bottleneck in the current smart terminal experience, which is the consensus of ordinary consumers and professionals. In the past few years, the smartphone market has been shrouded in the hardware arms race. Mobile phones follow Moore's Law in hardware configuration, but do not include battery technology. The growing popularity of battery life experience is essentially the rapid growth of mobile phone battery demand and the slow update of battery life technology. The result of the deterioration of the contradiction. In addition to smart phones, smart wearable devices, IoT and other emerging smart terminals, they face the same problem.

2 Smartphone Lifeline Solution

From the point of view of power consumption, chips and display screens are the main consumers of power consumption of smart phones, and they are also the focus of future device development. The application of new battery materials and new technologies is fundamental to the solution of the life cycle. Power-saving optimization and fast charging of soft and hard ones are the focus of competition among terminal manufacturers.

2.1 chip low power design

As a large power consumer of smart phone computing, how to reduce the power consumption of various chips used in mobile phones is the basic link to reduce the power consumption of the whole machine. The chip industry chain has been researching to improve performance while reducing power consumption. How to balance performance and power consumption is one of the focuses of future chip technology development.

(1) Chip instruction set streamlining and architecture optimization

At the top of the intelligent terminal chip eco-chain, ARM has been working on low-power design since its inception, designing an ARM-based reduced instruction set (relatively complex instruction set) for smartphones. In November 2011, ARM released the ARM V8 instruction set to bring mobile phone chips into the 64-bit era. In 2013, Apple adopted the A7 processor for the first time. Qualcomm and MediaTek also started to apply in 2014. Chips that currently use ARM's reduced instruction set and core have become mainstream in mobile phones and other smart devices.

In order to solve the power consumption problem caused by the "core war" of mobile phone chips, ARM introduced the big LITTLE (size and size) architecture [1], which combines the "big" core with heavy performance and the "small" core with low power consumption. Meet the high-performance needs of mobile phones while taking into account low power consumption. "Big" core Cortex-A57 heavy performance, design mainly from Cortex-A15, but based on ARM optimization (such as data prefetching and adding Registers, etc.), Cortex-A57 processing 32bit software is 20% to 30 faster than Cortex-A15 %. In actual use, the power consumption problem of A57 is more prominent. Many chips with A57 core have heating problems, such as Qualcomm Snapdragon 810. For this reason, ARM released the optimized Cortex-A72 core in early 2015, if 16nm process is adopted. Compared with the Cortex-A15 of the previous generation 28 process, the performance is 3.5 times, and the power consumption can be reduced by 75%. The "small" core Cortex-A53 minimizes chip area and power consumption while providing sufficient performance. Instead of using the Cortex-A57's power-hungry out-of-order pipeline design, it uses a simple sequential pipeline design. The Cortex-A53 offers Cortex-A9 performance with the previous generation's ARM v7 instruction set, but with a smaller chip size, it can be 40% smaller than the Cortex-A9 in the same process. If you use the 20nm process, the area is only 1/4 of the 32nm Cortex-A9, which helps reduce costs while reducing power consumption.

(2) Reduce power consumption through process technology

Compared with the instruction set and chip architecture design, the upgrade of the chip process process is more immediate to reduce the power consumption, which is also an important driving force for the accelerated iterative upgrade of the process process in recent years.

The three giants of Intel, Samsung and TSMC are in the first phalanx of chip manufacturing. Samsung's 14nm FinFET (Fin Field-Effect Transistor) technology has been mass-produced (Samsung Exynos 7420 chip), TSMC 16nm FinFET will also be mass-produced; Apple's latest A9 processing will use these two The most advanced process.

At the same time, the semiconductor process has entered the 3D era from 14nm/16nm. Compared with the previous 2D transistors, 3D FinFET has the advantages of low power consumption and small area.

(3) RF low power solution

At the level of reducing power consumption, smartphone RF chips are not as concerned as the main chip, but reducing power consumption has also been a mainstream trend.

The core challenge for 4G RF is to address the more cellular bands required for service demand and explosive growth in network capacity (currently the total number of global bands has reached 40). Several companies have launched a complete set of RF solutions, including integrated modules, multi-mode multi-frequency devices, envelope power tracking, etc. Qualcomm's RF360 solution [2] is representative of it. The integration of antenna switches in the power amplifier PA, support for various modes and frequency bands (from all major cellular formats after GSM and all bands in the current 3GPP protocol), supports global roaming. The Envelope Power Tracker (ET) adjusts the power amplifier (PA) power supply based on the transient demand of the signal. It is an upgrade of the traditional average power tracker (APT). The APT adjusts the power amplifier according to the power level grouping instead of the instantaneous signal demand. The amount of power supplied. The envelope power tracker interacts with the terminal modem to adjust the transmission power to meet the instantaneous demand of the transmitted content, rather than adjusting after a long time interval at constant power, reducing power consumption by up to 20% and reducing heat by nearly 30% ( Based on Qualcomm's testing and analysis). This extends battery life and reduces heat generation inside the slim body of the smartphone.

(4) Intelligent chip soft and hard integration optimization

With the improvement of chip hardware design and process technology, the smart chip platform came into being. The smart chip platform is an integrated hardware and software solution. Applying artificial intelligence, convolutional neural networks, big data and other technologies to the mobile phone chip platform will further reduce the power consumption of the chip. Qualcomm's latest Snapdragon 820 (listed early next year) is such a beneficial attempt.

2.2 display

Smartphones enter the big screen era (mainstream size 5 inches, 5.5 inches), and the screen becomes the module with the largest proportion of mobile phone power consumption. The result of continuous upgrade of large screen and PPI is a significant increase in power consumption.

Improving screen material is one of the effective solutions for reducing screen power consumption. OLED organic electroluminescent photodiodes are self-illuminating and require no backlight, which can effectively reduce power consumption. IGZO crystallizes indium, gallium, zinc and oxygen, which have been extremely difficult in the past, and realizes a new crystal structure of atomic arrangement. Based on this unique and detailed arrangement, IGZO display has great stability. At the same time, IGZO has a very high electron mobility, the higher the mobility, the smaller the resistivity, and the smaller the power consumption when passing the same current.

For the traditional LCD display, the gamma correction of the input image signal and the surrounding brightness is improved by increasing the panel aperture ratio, lowering the driving voltage, improving the backlight source, the luminous efficiency of the white LED, and improving the performance of the optical material. Image processing such as screen brightness control to reduce display panel power consumption.

In addition, software can reduce the screen resolution, grayscale display, etc. to reduce power consumption and increase endurance.

2.3 battery

The fundamental means of solving the battery life problem is the open source approach, which is to increase battery capacity and develop new high-efficiency battery technology. However, in recent years, there has been no breakthrough in battery technology. The commercial development of new materials such as solar cells, magnesium-ion batteries, and supercapacitors is not optimistic. In contrast, the improved technology of lithium-ion batteries is still the focus of the industry and the most realistic. solution.

The mainstream of the current battery is a polymer lithium battery core, graphite as a negative electrode, the energy density of the graphite carbon negative battery reaches 600WH/L, and the introduction of a silicon negative electrode material to enhance the energy density of the battery is recognized in the industry. First, the graphite negative electrode battery is changed into a silicon-based negative electrode battery by replacing the graphite with silicon carbon.

At present, the battery energy density of general mobile phone manufacturers is mostly 560~580WH/L. Among the popular models, the millet note battery capacity is 3000mAh, the energy density is 676.5Wh / L; the Huawei Glory 6 Plus is 3600mAh, and the battery energy density is 595Wh/L. . It is reported that many mobile phone manufacturers in the industry test 650~720WH/L high-density silicon negative battery in the new mobile phone solution. If the pure silicon negative electrode material energy density is expected to reach 900WH/L. In 2015, 700WH/L high energy density battery products based on silicon anode materials will be commercially available. In particular, in addition to energy density, performance indicators such as safety, expansion, and circulation are also important issues for high energy density batteries.

In addition, 4.35V high-voltage battery technology, silicon carbon anode technology, nano-ceramic coating film coating technology, etc. are also the direction of lithium-ion battery improvement.

2.4 Fast charging

While developing power-saving technologies, fast charging is becoming a compromise that can be rapidly applied and popularized on a large scale. In principle, the implementation of fast charging is mainly achieved by increasing the voltage or current or both.

The mainstream chip suppliers Qualcomm and MediaTek have released fast charging solutions and integrated into the chip platform. Among the chip maker solutions, Qualcomm's Quick Charge Fast Charge Solution [3] ecosystem is the most mature, has been developed to QuickCharge 2.0, there are two specifications: Class A (5/9/12V) and ClassB (5/9/12 /20V); chip, Qualcomm full range of chip support. MediaTek Pump Express [4] allows the charger to determine the initial voltage required for charging according to the current. The pulse current command sent by the PMIC is transmitted to the charger via the USB Vbus. The charger adjusts the output voltage according to this command, and the voltage gradually increases to 5V to reach the maximum. recharging current.

The fast charge industry chain includes protocols, adapters (charge ICs), power management chips, and chip platforms. In addition to the aforementioned Qualcomm and MediaTek, there are also fast charging protocols and solutions such as TI's Max Charge and Fairchild's ACCP (AdapTIve Charger Communica TIon Protocol). Fast charging protocols are currently not interoperable, and mainstream power IC manufacturers are beginning to support multiple fast charging protocols.

Among the terminal manufacturers, OPPO's VOOC flash charging [5] is the most representative and has been developed to version 2.0. VOOC uses a charging method that reduces the voltage and increases the current (5V/4.5A), moving the charging control circuit from the mobile phone side to the adapter side, and requires a series of specially-customized accessories, including adapters (new charging control circuit + intelligent MCU control) ), battery (custom 8 contacts), data lines, circuits, interfaces (7pin), etc.

From a cost point of view, faster charging requires more cost in charging ICs, protection circuits, batteries, etc. than conventional charging solutions. The VOOC-specific solution costs the most, followed by Qualcomm's Quick Charge program, and MediaTek Pump Express is relatively economical.

In terms of the fast charging experience, the current expectations of terminal manufacturers are basically 30% charging in 10 minutes and 70% charging in 30 minutes.

2.5 Soft and hard integrated power saving technical solution

For smart phones, the power saving of a single dimension or device is far from enough. The soft and hard integrated power-saving scheme based on network and user usage behavior is the key research object of the industry chain. The optimization direction in the industry includes resource scheduling optimization at the operating system level, context-aware power saving, and base station blacklist management optimization.

The scheduling optimization at the operating system level is mainly based on the APP application behavior optimization scheduling Android system resources, based on the performance requirements of the application layer, the CPU processing capability (size and kernel) intelligent scheduling, dynamic power dispatch management, and soft and hard integrated scheduling optimization.

The situation-aware-based power-saving scheme can effectively identify the user's walking, running, driving, sleeping, etc., in order to provide targeted power-saving measures. Vertically integrated software system, through FM management, LCD backlight management, protocol optimization, background application management, operation process management, peripheral switch management, etc., effectively reduce the overall power consumption. According to the user's situation, with dynamic frequency modulation, dynamic frame dropping, process cooling, etc., the power consumption of the whole machine can be reduced. Context-aware technology needs to be iteratively optimized based on big data accumulation.

Base station blacklist management optimization can automatically detect the network environment, reduce ping-pong switching, and reduce standby power consumption. A small range of fluctuations in network signals is likely to cause a mobile phone ping-pong network, which consumes a large amount of mobile phone power. Based on a large number of external field data modeling, the identification algorithm of the interfering cell is established and optimized to form a blacklist power optimization technology.

3 Wearable and IoT terminal endurance solution analysis

If the smartphone's battery life problem only affects the user experience, for the emerging wearable and IoT (Internet of things) terminals such as wristbands, smart watches, and smart glasses, the battery life problem is a survival problem, to a certain extent. Determined the market prospects and space for this category.

The biggest bottleneck for wearable and IoT terminals is limited by the size of the device and the limitations of the battery material, which is difficult to support the user's experience. Smartphones need to handle more complex multimedia operations, while wearable and IoT terminals are generally relatively simple, and the industry has adopted low-power technology from the start.

3.1 chip and sensor low power scheme

Since the computing and processing capabilities required for wearable and IoT terminals are relatively low, the chip solutions are mostly in the form of MCUs, and a few such as smart watches and smart glasses use low-end mobile phone chip processors.

Whether it is the ARM architecture Cortex M series (for different application scenarios, the ARM Cortex M series is subdivided into M0-M7) or the MIPS architecture MCU, the design is oriented to the low-power field, the chip single core, the main frequency The lower ones are only a few tens of megahertz, which is less natural than the mobile phone chips of G Hertz.

Sensors used in wearable and IoT terminals, such as accelerometers, gyroscopes, and other professional sensors, have lower power consumption, mainly with the MCU for overall low-power design, and the device itself has not been specially processed for this purpose. .

3.2 Wireless connection targeted optimization design

Terminals such as car networking and field monitoring require wireless communication, but the requirements for speed and frequency are low. If the wireless module used on the mobile phone is used in such a terminal, power consumption, overperformance, and high cost may occur. For IoT terminals, the 3GPP organization released Cat.0 [6] in R12. To reduce equipment complexity and reduce equipment costs, Cat.0 defines a series of simplified solutions, including: Half duplex FDD (Half duplex FDD); reduce device receive bandwidth to 1.4MHz, of course, Expanded to 20MHz; single receive path, cancel RX diversity dual path; maintain low speed data rate. The simplification scheme not only reduces the rate requirement, but also reduces the processor computing power and storage capacity. There will be further optimizations in the R13 version, such as canceling transmit diversity, no longer supporting MIMO, supporting lower bandwidths of less than 1.4MHz, supporting lower data rates, and so on.

In order to save power, the 3GPP R12 adopts the PSM (Power Saving Mode) scheme. If the device supports PSM, the PSM requests an activation timer value from the network during the Attach or TAU (Tracking Area Update) process. When the device transitions from the connected state to the idle state, the timer starts running. When the timer expires, the device enters the power saving mode, and the device no longer receives the paging message. It seems that the device and the network are out of sync, but the device is still registered on the network. The device will maintain this power saving mode until the device needs to actively send information to the network (such as periodic TAU, send uplink data, etc.).

3.3 Low power overall solution

Solutions for wearable and IoT devices are mainly through low-power Bluetooth, low-power Wi-Fi, low-power GPS, low-power 3G/4G modules and MCUs (or other low-power master chips), sensors A complete set of solutions for hardware integration design. For different application scenarios, major chip solution vendors offer low-power solutions such as BLE+MCU, Wi-Fi+MCU, GPS+MCU, Zigbee+MCU. In these wireless connection technologies, the problem of "dead" power consumption is required.

3.4 Algorithm Optimization

While wearable and IoT terminals have low hardware power consumption, software algorithms are also an important means to reduce power consumption and optimize battery life. MCU dynamic sleep algorithm, step algorithm optimization, data interaction algorithm optimization, etc. can optimize terminal power consumption.

4 Intelligent terminal life experience enhances future

As mentioned above, the root cause of the bottleneck of the endurance experience of smart terminals is that the contradiction between the excessive growth of mobile phone battery demand and the slow update of battery life technology is increasingly sharp. At the battery demand level, as the smartphone hardware upgrade enters a stable period, the user's power consumption demand increases and the growth slows down. The key to the improvement of future battery life experience is the development of battery life technology. In addition to the above-mentioned new technology innovations, the continuous maturity of flexible batteries and solid-state thin-film lithium batteries will bring the gospel of the evolution of the intelligent terminal form and the improvement of the endurance experience. On the whole, with the popularization of new technology solutions for smart terminal life and the application of new materials, the prospect of improving the endurance experience of smart terminals is expected.

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