Server memory

The server memory is also RAM. It has no obvious and substantive difference between the appearance and structure of ordinary PC (personal computer) machines. It mainly introduces some new unique technologies on the memory, such as ECC, ChipKill, and so on. Hot swap technology, etc., with high stability and error correction performance.

Main memory server technology:

(1) ECC

In common memory, a technique often used is Parity. Parity check codes are widely used in error detection codes. They add a check bit to each data element ( Or bytes), and can detect all odd (even) parity errors in a character, but Parity has a disadvantage. When the computer finds a Byte error, it cannot determine which bit the error is. Unable to fix the error. Based on the above situation, a new memory error correction technique has been developed. That is, ECC, ECC itself is not a memory model, nor is it a memory-specific technology. It is a kind of computer instruction widely used in various fields. , is a kind of instruction error correction technology. ECC's full name in English is "Error Checking and Correcting" and the corresponding Chinese name is called "Error Checking and Correcting." From this name we can see that its main function is "finding and correcting errors", which is more than odd parity correction technology. The more advanced aspect is that it can not only find errors, but also correct these errors. After these errors are corrected, the computer can correctly perform the following tasks to ensure the normal operation of the server. The reason why it is not a memory model is that it is not a technology that affects the memory structure and memory speed. It can be applied to different memory types, just like the “parity” memory mentioned earlier. It is also not a type of memory. The earliest applications of this technology are EDO memory. Nowadays, SD is also used. ECC memory is mainly applied from SD memory, and new DDR and RDRAM have corresponding applications. ECC memory is actually an SD memory.

(2)Chipkill

Chipkill technology is a new ECC memory protection standard developed by IBM in order to solve the current shortage of ECC technology in server memory. We know that ECC memory can only detect and correct single-bit errors at the same time. However, if more than two bits of data are detected at the same time, it is generally incapable of doing anything wrong. At present, ECC technology is widely used in server memory. One reason is that other new memory technologies are not yet mature. In addition, the system speed is still very high in current servers. At this time, the frequency is generally the same time. The phenomenon of multi-bit errors has rarely occurred. Because of this, the ECC technology has been fully recognized and applied, making the ECC memory technology a memory standard on almost all servers.

However, as the CPU performance of servers based on Intel processor architecture increases at a geometric multiple, and the performance of hard disk drives only increases by a few times over the same period, the server requires a large amount of memory to temporarily save the CPU for sufficient performance. The need to read the data, such a large amount of data access leads to a single memory chip usually provide 4 (32-bit) or 8 (64-bit) bits of data for each access, read a lot of data at once, The possibility of multi-bit data errors will greatly increase, and ECC can not correct more than two bits of error, it is likely to cause the loss of all bits of data, the system will soon collapse. IBM's Chipkill technology uses memory substructure methods to solve this problem. The design principle of the memory subsystem is such that a single chip, regardless of the data width, only affects a given ECC identification code, and its effect is at most one bit. As an example to illustrate, if 4-bit wide DRAM is used, the parity of each of the 4 bits will constitute a different ECC identification code. This ECC identification code is stored in a single data bit, That is saved in a different memory space address. Therefore, even if the entire memory chip fails, at most one bit of bad data will appear for each ECC ID. This situation can be completely repaired by the ECC logic to ensure the fault tolerance of the memory subsystem and ensure that the server is in failure. At that time, there is a strong self-recovery ability. The memory using this memory technology can check and repair 4 wrong data bits at the same time, and the reliability and stability of the server are more fully protected.

(3) Register

Register is a register or a directory register. It can be regarded as the directory of the book by using the register or directory register. With it, when the memory receives a read/write instruction, this directory will be retrieved first, and then the read/write operation will be performed. Improve server memory productivity. Memory with Register must have Buffer, and Register memory currently visible also has ECC function. Its main application is in high-end servers and graphics workstations, such as IBM Netfinity 5000.

(4) FB-DIMM

FB-DIMM (Fully Buffered-DIMM) is a new type of memory module and interconnect architecture developed by Intel based on DDR2 and DDR3. It can be used with existing DDR2 memory chips, and it can also be used with the future. DDR3 memory chip. FB-DIMMs can greatly increase the system memory bandwidth and greatly increase the maximum memory capacity.

The FB-DIMM technology is developed by Intel to solve the memory performance constraints on the overall system performance. It achieves a leap-type performance improvement on the basis of the existing technology, and at the same time, the cost is relatively low. In the entire computer system, memory can be said to be the key factor determining the performance of the whole machine. Fast CPU, no good memory system cooperates with it, and the CPU performance is no longer excellent. This kind of situation is decided by the principle of the computer, the data that CPU needs in the operation is all taken from the memory, if the memory system can't supply data to the CPU in time, CPU has to wait for a long time in a waiting state, hardware resources Idle, performance naturally can not be played. For ordinary personal computers, because of the single-processor system, the current memory bandwidth has been able to meet its performance requirements; and for multi-channel servers, because it is a multi-processor system, the memory bandwidth and memory capacity is Extremely craving, traditional memory technology can no longer meet its needs. This is because current common DIMMs use a "stub-bus" topology in which each chip and the memory controller's data bus have a short circuit connection. The inconsistency of the electrical impedance affects the stability and integrity of the signal. The higher the frequency or the more data of the chip, the greater the influence. Although Rambus's new memory technology, such as XDR memory, has extremely high performance, there is a problem of high cost, which makes it less popular. The emergence of FB-DIMM technology is a good solution to this problem, both to provide greater memory capacity and better memory bandwidth, but also to maintain a relatively low cost. Compared with XDR, FB-DIMMs have lower performance than XDRs, but their cost is much lower than that of XDRs.

Compared with the existing ordinary DDR2 memory, FB-DIMM technology has great advantages: at the same memory frequency, it can now provide four times the bandwidth of ordinary memory, and the maximum memory capacity that can be supported also reaches the ordinary memory. At 24 times, the system can support up to 192GB of memory. The biggest feature of FB-DIMM is the use of existing DDR2 memory chips (later DDR3 memory chips will also be used), but it uses the AMB (Advanced Memory Buffer) on the memory PCB to convert parallel data into strings. Data is streamed and transmitted to the processor via a point-to-point high-speed serial bus, such as PCI Express.

Compared with the common DIMM module technology, the data and command transmission between the FB-DIMM and the memory controller is no longer the traditional design of the parallel line, and the serial interface multi-channel parallel design similar to the PCI-Express is adopted. Serial data transmission. In this new architecture, the buffers on each DIMM are connected in series with each other, with a point-to-point connection between them. Data is passed to the next buffer after passing through the first buffer. In this way, the first buffer is used. The impedance of the connection between the zone and the memory controller can always be stable, which contributes to the increase in capacity and frequency.

Typical server memory type

Currently there is a server commonly used memory SDRAM and DDR, DDR2 three kinds of memory.